Efficient procedure mapping using cache line coloring
نویسندگان
چکیده
منابع مشابه
Eecient Procedure Mapping Using Cache Line Coloring
As the gap between memory and processor performance continues to widen, it becomes increasingly important to exploit cache memory e ectively. Both hardware and software approaches can be explored to optimize cache performance. Hardware designers focus on cache organization issues, including replacement policy, associativity, line size and the resulting cache access time. Software writers use va...
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As the gap between memory and processor performance continues to widen, it becomes increasingly important to exploit cache memory effectively. Both hardware and software approaches can be explored to optimize cache performance. Hardware designers focus on cache organization issues, including replacement policy, associativity, block size and the resulting cache access time. Software writers use ...
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Efficient exploitation of the available cache memory space can have a significant improvement in program performance. By carefully restructuring a program such that temporally local sequences of instructions are mapped to different portions of the cache, fewer cache conflicts will result. In this paper we present a link-time procedure mapping algorithm which views the cache as a colored address...
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Modern microprocessors dedicate a large portion of the chip area to the cache. Decreasing the energy consumption of the microprocessor, which is a very important design goal especially for small, battery powered, devices, depends on decreasing the energy consumption of the memory/cache system in the microprocessor. The authors investigate the energy consumption in caches and present a novel cac...
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ژورنال
عنوان ژورنال: ACM SIGPLAN Notices
سال: 1997
ISSN: 0362-1340,1558-1160
DOI: 10.1145/258916.258931